韩银和，博士，中科院计算所副研究员。 主要研究方向：集成电路设计与测试，计算机容错结构设计。他于2001年获得南京航空航天大学工学学士学位，2006年获得中国科学院计算技术研究所工学博士学位。因为在集成电路测试方面的工作，他获得了中科院院长特别奖，中科院优秀博士论文，中国计算机学会优秀博士论文，以及全国优秀博士论文提名（奖）等。他还获得IEEE Asian Test Symposium 2003的最佳论文奖，北京市科技进步奖，计算机学会王选奖等。担任2009年IEEE寄存器传输与高层测试学术研讨会（WRTLT’09）程序合作主席。
代表论著
国际刊物论文 [1]Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li and Huawei Li. “On Topology Reconfiguration for Defect-Tolerant NoC-Based Homogeneous Manycore Systems”, Will be published in IEEE Transactions on Very Large Scale Integration (VLSI) Systems. [2]Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li，Anshuman Chandra, “Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit”，IEEE Transactions on Very Large Scale Integration Systems, Vol.15, No.5, pp.531-540，May, 2007。 [3]Yinhe Han, Xiaowei Li, Huawei Li, Anshuman Chandra, "Embedded Test Resource for SoC to Reduce Required Tester Channels Based on Advanced Convolutional Codes"， IEEE Transactions on Instrumentation and Measurement，Vol. 55, No. 2, April, pp. 389-399, 2006。 [4]Yinhe Han，Yu Hu，Xiaowei Li，Huawei Li，Anshuman Chandra，Xiaoqing Wen， “Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores”，IEICE Transactions On Information and Systems，Vol. E88-D，No.9，pp. 2126-2134，2005。
国际会议论文 [5]Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li, “MicroFix: Exploiting Path-grained Timing Adaptability for improving power-performance efficiency”, ISLPED 2009. [6]Guihai Yan, Yinhe Han, Xiaowei Li, “A Unified Online Fault Detection Scheme via Checking of Stability Violation”, DATE 2009. [7]Jianliang Gao, Yinhe Han.and Xiaowei Li, "A New Post-silicon Debug Approach Based on Suspect Window", VTS 2009. [8]Lei Zhang, Yinhe Han, Qiang Xu, and Xiaowei Li, “Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology,” DATE 2008. [9]Yinhe Han, Yu Hu, Huawei Li, and Xiaowei Li, “Theoretic Analysis and Enhanced X-Tolerance of Test Response Compact based on Convolutional code,” ASPDAC 2005. [10]Yinhe Han, Yongjun Xu, Anshuman Chandra, Huawei Li, and Xiaowei Li, “Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channel Reduction,” ATS 2003.
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韩银和
科研人员集成电路设计与测试、计算机容错结构设计
韩银和，博士，中科院计算所副研究员。 主要研究方向：集成电路设计与测试，计算机容错结构设计。他于2001年获得南京航空航天大学工学学士学位，2006年获得中国科学院计算技术研究所工学博士学位。因为在集成电路测试方面的工作，他获得了中科院院长特别奖，中科院优秀博士论文，中国计算机学会优秀博士论文，以及全国优秀博士论文提名（奖）等。他还获得IEEE Asian Test Symposium 2003的最佳论文奖，北京市科技进步奖，计算机学会王选奖等。担任2009年IEEE寄存器传输与高层测试学术研讨会（WRTLT’09）程序合作主席。
代表论著
国际刊物论文
[1]Lei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li and Huawei Li. “On Topology Reconfiguration for Defect-Tolerant NoC-Based Homogeneous Manycore Systems”, Will be published in IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[2]Yinhe Han, Yu Hu, Xiaowei Li, Huawei Li，Anshuman Chandra, “Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for Complex Processor Circuit”，IEEE Transactions on Very Large Scale Integration Systems, Vol.15, No.5, pp.531-540，May, 2007。
[3]Yinhe Han, Xiaowei Li, Huawei Li, Anshuman Chandra, "Embedded Test Resource for SoC to Reduce Required Tester Channels Based on Advanced Convolutional Codes"， IEEE Transactions on Instrumentation and Measurement，Vol. 55, No. 2, April, pp. 389-399, 2006。
[4]Yinhe Han，Yu Hu，Xiaowei Li，Huawei Li，Anshuman Chandra，Xiaoqing Wen， “Wrapper Scan Chains Design for Rapid and Low Power Testing of Embedded Cores”，IEICE Transactions On Information and Systems，Vol. E88-D，No.9，pp. 2126-2134，2005。
国际会议论文
[5]Guihai Yan, Yinhe Han, Hui Liu, Xiaoyao Liang, Xiaowei Li, “MicroFix: Exploiting Path-grained Timing Adaptability for improving power-performance efficiency”, ISLPED 2009.
[6]Guihai Yan, Yinhe Han, Xiaowei Li, “A Unified Online Fault Detection Scheme via Checking of Stability Violation”, DATE 2009.
[7]Jianliang Gao, Yinhe Han.and Xiaowei Li, "A New Post-silicon Debug Approach Based on Suspect Window", VTS 2009.
[8]Lei Zhang, Yinhe Han, Qiang Xu, and Xiaowei Li, “Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology,” DATE 2008.
[9]Yinhe Han, Yu Hu, Huawei Li, and Xiaowei Li, “Theoretic Analysis and Enhanced X-Tolerance of Test Response Compact based on Convolutional code,” ASPDAC 2005.
[10]Yinhe Han, Yongjun Xu, Anshuman Chandra, Huawei Li, and Xiaowei Li, “Test Resource Partitioning Based on Efficient Response Compaction for Test Time and Tester Channel Reduction,” ATS 2003.
主持的科研项目
1.863探索类项目，“大规模多核处理器系统片上高性能互连技术研究”， 在研
2.国家自然科学基金面上项目，“片上网络芯片中路由器和互连线的测试方法研究”，在研
3.863探索类项目（副组长），“多处理器片上系统运行中低功耗关键技术研究”，在研
4.NSFC与香港RGC联合科研基金项目（陆方合作申请人之一），“片上系统测试架构设计与优化：针对噪声引起的测试良产率下降的研究”，在研