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Why Design for Test (DFT) and Where It Goes

撰稿: 摄影: 发布时间:2013年03月17日
时间:2013年3月19日(周二)上午10:00-11:30
地点:748会议室


摘要
With increasing complexity and size of integrated circuits, today’s large SoCs are more and more difficult to test and verify. It is not only very expensive but also extremely time consuming. This challenge is going to stay with Moore’s law continuing to take effect. IC companies are putting more and more resources to tackle these problems. The goal is to ensure fast time-to-market, high product quality,low test cost, and quick yield ramp-up.

In order to achieve this goal, at the early stage of architectural design testing has to be taken into account. The effect of DFT goes through the entire design flow but it does not stop there. This presentation will review some of important roles that DFT plays in post-silicon verification/debug, manufacture test and yield analysis. Hopefully this talk can serve as a starting point for discussion that we could learn and benefit from each other.

 
 
主讲人简介
赖李洋(LAI/LIYANG)
1997年毕业于北京大学计算机系微电子学专业,2000年获中科院微电子中心硕士学位,导师是仇玉林老师。2005年获美国University of Illinois at Urbana-Champaign(UIUC)电子与计算机工程系博士学位,师从于国际著名计算机体系结构和VLSI测试专家Professor Janak H. Patel。

博士毕业后一直在美国Mentor Graphics公司工作。Mentor Graphics是世界第一的DFT解决方案提供商。任可测性设计前瞻性研究组成员(Member of Advanced DFT Research Group)。主要从事集成电路可测试性设计(Design For Test),验证,故障诊断(Diagnosis),Silicon Debug的研究。拥有完整的VLSI测试从前端(Design)到后端(Diagnosis),以及良率分析(Yield Analysis )业界经验。在Mentor Graphics期间,完成多项业界领先的研究成果,并应用于Mentor Graphics 的DFT解决方案。提出和完成了多项逻辑自测试Logic Built-In Self Test(LBIST)的架构设计。主持并研发了基于内存自测试的嵌入式内存的故障诊断系统(MBIST diagnosis)和基于逻辑自测试(LBIST)的故障诊断系统(LBIST Diagnosis)。做为主要设计师,架构了基于P1687(IJTAG)的桌面测试系统Silicon Insight,用于通过JTAG Interface的大规模SoC的测试及调试。是多项可测试性设计及故障诊断专利的发明人,IEEE Member,STDF Memory Fail Datalog标准委员会成员和多项国际会议及期刊如ITC,VTS,DAC,ICCAD的审稿人。

在本研究领域顶级国际会议ITC,VTS etc发表多篇学术论文,其中关于Signature Based Diagnosis for Logic BIST的研究成果是业界第一个可以应用于大规模生产测试的Logic BIST故障诊断的解决方案,获得了2006 年国际测试大会(International Test Conference)Ned Kornfield 最佳论文奖。
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