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Scaling the Main Memory System in the Many-Core Era

撰稿: 摄影: 发布时间:2012年08月07日

时间:2012年6月28日(周四)下午15:30-17:00
地点:446会议室

摘要
The main memory system is a fundamental performance and energy bottleneck in almost all computing systems. Recent trends towards increasingly more cores on die, consolidation of diverse workloads on a single chip, and difficulty of DRAM scaling impose new requirements and exacerbate old demands on the memory system. In particular, the need for memory bandwidth and capacity is increasing, applications’ interference in memory system increasingly limits system performance and makes the system hard to control, memory energy and power are key design concerns, and DRAM technology consumes significant amount of energy and does not scale down easily to smaller technology nodes. Fortunately, some promising solution directions exist. In this talk, we will cover our recent research on tackling challenges related to scaling the capacity, energy-efficiency, bandwidth, and feature size of main memory. We will examine three major solution directions: 1) how to design more efficient and higher-bandwidth DRAM architectures, 2) how to employ emerging memory technologies in a hybrid memory system, and, if time permits, 3) how to enable more predictable and QoS-aware main memory systems.

主讲人简介
OnurMutlu is an Assistant Professor of ECE (and by courtesy CSD) at Carnegie Mellon University. His broader research interests are in computer architecture and systems, especially in the interactions between languages, operating systems, compilers, and microarchitecture. He enjoys teaching and researching important and relevant problems in computer architecture, including problems related to the design of memory systems, multi-core architectures, and scalable and efficient systems. He obtained his PhD and MS in ECE from the University of Texas at Austin (2006) and BS degrees in Computer Engineering and Psychology from the University of Michigan, Ann Arbor. Prior to Carnegie Mellon, he worked at Microsoft Research (2006-2009), Intel Corporation, and Advanced Micro Devices. He was a recipient of the IEEE Computer Society Young Computer Architect Award, CMU College of Engineering George Tallman Ladd Research Award, ASPLOS and VTS Best Paper Awards in 2010, NSF CAREER Award, Microsoft Gold Star Award, University of Texas Graduate Research Excellence Award, and a number of “computer architecture top pick” paper selections by the IEEE Micro magazine. For more information, please see http://www.ece.cmu.edu/~omutlu.

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