On 2 November 2006, Mr.Brian A Moore and Dr.Jin Yang (from Intel) had a short visit. Mr.Moore gave a talk "Terascale Computing and What It Means for Validation".
Abstract: Silicon technology scaling will continue to support higher levels of integration, many-core processors architectures and advanced computing trends such as Tera-Scale computing. Each of these trends will require significant advances in design and validation; and higher levels of silicon variation will require more sophisticated validation and test technologies in support of runtime reliability. Intel’s Validation Research Lab is chartered with identifying technology trends and conducting research that is vital to intercepting technology trends on Intel’s strategic roadmap. VRL’s research scope includes pre- and post-silicon validation and in-situ runtime validation. This presentation will provide an overview of the validation problem space and the challenges we are facing as we move forward. It will also look at the types of research that we believe is critical to meet these challenges.
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